1. Field of the Invention
This invention generally relates to semiconductor manufacturing equipment and, more particularly, to an apparatus, system, and method used for thermal processing of semiconductor wafers.
2. Description of the Related Art
During the processing of semiconductor devices, it is highly desirable to very accurately control the thermal treatment to which the devices are exposed during processing. In some instances, batches of devices, primarily wafers, are processed in a semiconductor processing furnace, which has a carefully controlled processing environment to effect the desired processes.
Of importance to the present invention are processing furnaces, which have vertically arranged wafer arrays and processing chambers. Vertically arranged furnaces were designed to provide better control of temperature and other processing parameters. For example, in U.S. Pat. No. 4,738,618, a vertically arranged thermal processor is disclosed having a vertically adjustable furnace assembly and process tube. The process tube, constructed from a quartz bell jar, is vertically moveable in up and down directions within a supporting framework in conjunction with a likewise moveable furnace assembly. Additionally, the furnace assembly and process tube are moveable together between up and down positions, as well as independently of one another. Heat is supplied to the thermal processor when the furnace assembly and process tube are both lowered into the down position by controlling operation of heating elements within the furnace assembly. To cool the process tube within the thermal processor, the operation of the heating elements is regulated, such that interior heat is dissipated to the exterior of the processor by convection.
It is generally desirable in vertically arranged furnaces to achieve a desired temperature environment within the process chamber so that wafers or other semiconductor devices are heated at uniform rates and to uniform temperatures. The more quickly the uniform environment is achieved the less risks of processing variations between wafers and between different batches of wafers. Unfortunately, it has been found that the desired temperature is usually non-uniform throughout the process chamber in all directions relative to the array of wafers being processed. The temperature non-uniformity is typically due to variations in temperature between different regions of the processing chamber. The ability to control these variations in temperature becomes more difficult as faster thermal ramp-up and ramp-down targets are attempted in the process chamber. In general, the conventional arrangement of heating elements used in and/or around the processing chamber creates a delay in thermal response of the process chamber temperature, which makes accurate dynamic control of the temperature during ramp-up, ramp-down, and changing temperature rate conditions particularly difficult.
For the above reasons, what is needed is an apparatus and method for isothermally distributing a temperature across the surface of a semiconductor device which provide an accurate dynamic control of the process temperature, without a degradation in uniformity of the processed wafers.